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[/] [pci/] [tags/] [asyst_3] - Rev 84

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Rev Log message Author Age Path
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 8019d 05h /pci/tags/asyst_3
58 Removed all logic from asynchronous reset network mihad 8024d 05h /pci/tags/asyst_3
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 8024d 11h /pci/tags/asyst_3
56 Number of state bits define was removed mihad 8025d 02h /pci/tags/asyst_3
55 Changed state machine encoding to true one-hot mihad 8025d 02h /pci/tags/asyst_3
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 8058d 04h /pci/tags/asyst_3
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 8058d 07h /pci/tags/asyst_3
52 Oops, never before noticed that OC header is missing mihad 8058d 12h /pci/tags/asyst_3
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 8058d 12h /pci/tags/asyst_3
50 Got rid of undef directives mihad 8061d 04h /pci/tags/asyst_3

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