URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_10] - Rev 93

Rev	Log message	Author	Age	Path
69	Changed BIST signal names etc..	mihad	7968d 14h	/pci/tags/rel_10
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7972d 00h	/pci/tags/rel_10
67	Changed BIST signals for RAMs.	tadejm	7972d 04h	/pci/tags/rel_10
66	Changed empty status generation in pciw_fifo_control.v	mihad	7975d 15h	/pci/tags/rel_10
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7978d 13h	/pci/tags/rel_10
64	The testcase I just added in previous revision repaired	mihad	7978d 15h	/pci/tags/rel_10
63	Added additional testcase and changed rst name in BIST to trst	mihad	7978d 17h	/pci/tags/rel_10
62	Added BIST signals for RAMs.	mihad	7981d 10h	/pci/tags/rel_10
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7989d 10h	/pci/tags/rel_10
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7989d 11h	/pci/tags/rel_10