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[/] [pci/] [tags/] [rel_5/] - Rev 154

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Rev Log message Author Age Path
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7930d 23h /pci/tags/rel_5
58 Removed all logic from asynchronous reset network mihad 7935d 23h /pci/tags/rel_5
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7936d 05h /pci/tags/rel_5
56 Number of state bits define was removed mihad 7936d 20h /pci/tags/rel_5
55 Changed state machine encoding to true one-hot mihad 7936d 21h /pci/tags/rel_5
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7969d 22h /pci/tags/rel_5
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7970d 02h /pci/tags/rel_5
52 Oops, never before noticed that OC header is missing mihad 7970d 06h /pci/tags/rel_5
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7970d 06h /pci/tags/rel_5
50 Got rid of undef directives mihad 7972d 22h /pci/tags/rel_5

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