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[/] [pci/] [tags/] [rel_8/] - Rev 93

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Rev Log message Author Age Path
69 Changed BIST signal names etc.. mihad 7960d 03h /pci/tags/rel_8
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7963d 13h /pci/tags/rel_8
67 Changed BIST signals for RAMs. tadejm 7963d 17h /pci/tags/rel_8
66 Changed empty status generation in pciw_fifo_control.v mihad 7967d 04h /pci/tags/rel_8
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7970d 02h /pci/tags/rel_8
64 The testcase I just added in previous revision repaired mihad 7970d 04h /pci/tags/rel_8
63 Added additional testcase and changed rst name in BIST to trst mihad 7970d 06h /pci/tags/rel_8
62 Added BIST signals for RAMs. mihad 7972d 23h /pci/tags/rel_8
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7980d 23h /pci/tags/rel_8
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7981d 00h /pci/tags/rel_8

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