URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp_sgdma/] [ap_n_dpc.vhd] - Rev 248

Rev	Log message	Author	Age	Path
160	Corrections derived from simulation debugging	jguarin2002	4464d 07h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
158	Changing std_logic_vector types to my custom far more convinients xfloat32\!	jguarin2002	4465d 21h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
153	last modifications for tb_compiler.py compliance	jguarin2002	4472d 13h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
152	Test bench oriented modifications	jguarin2002	4476d 14h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
151	Previous Work to generate test benching	jguarin2002	4535d 10h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
150	First Beta of RayTrac for a total size of 3874 lcells. Great Result\!	jguarin2002	4549d 07h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
149	Results Queue writing signals set on a single standard logic vector rather than in individual bits	jguarin2002	4549d 10h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
148	Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B	jguarin2002	4549d 10h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
147	Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified.	jguarin2002	4551d 22h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd
145	State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig	jguarin2002	4564d 06h	/raytrac/branches/fp_sgdma/ap_n_dpc.vhd