URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif] - Rev 68

Rev	Log message	Author	Age	Path
25	tb.sv is renamed as tb_top	dinesha	4503d 02h	/sdr_ctrl/trunk/verif
24	Clean Up	dinesha	4503d 02h	/sdr_ctrl/trunk/verif
22	Pad sdram clock added	dinesha	4504d 07h	/sdr_ctrl/trunk/verif
21	Clean up	dinesha	4504d 07h	/sdr_ctrl/trunk/verif
20	8 Bit SDARM support is added	dinesha	4506d 02h	/sdr_ctrl/trunk/verif
19	8 Bit SDRAM Support added	dinesha	4506d 02h	/sdr_ctrl/trunk/verif
18	8 Bit SDRAM Support is added	dinesha	4506d 02h	/sdr_ctrl/trunk/verif
17	micron 8 bit memory models are added into svn	dinesha	4506d 02h	/sdr_ctrl/trunk/verif
14	Unnecessary device config are removed	dinesha	4509d 03h	/sdr_ctrl/trunk/verif
12	Column Bits are made programmable	dinesha	4509d 03h	/sdr_ctrl/trunk/verif