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[/] [sdr_ctrl] - Rev 55

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Rev Log message Author Age Path
35 Updated the New Documents - ver 0.1 dinesha 4520d 03h /sdr_ctrl
34 Removed the older version dinesha 4520d 03h /sdr_ctrl
33 clean up dinesha 4520d 04h /sdr_ctrl
32 Debug is enable through +define dinesha 4522d 03h /sdr_ctrl
31 Integrated SDRAM controller with wishbone interface is added into SVN dinesha 4522d 03h /sdr_ctrl
30 test bench file for integrated SDRAM controller with wish bone and Standalone SDRAM controller test bench are added into SVN dinesha 4522d 03h /sdr_ctrl
29 SDRAM top and core related run file list are added into svn dinesha 4522d 03h /sdr_ctrl
28 SDRAM top and SDRAM Core Golden files are added into SVN dinesha 4522d 03h /sdr_ctrl
27 Golden log file corresponds the SDRAM core level test case are added into svn dinesha 4523d 01h /sdr_ctrl
26 invalid log files are removed dinesha 4523d 01h /sdr_ctrl

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