URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0] - Rev 152

Rev	Log message	Author	Age	Path
132	stop simulation upon assertion error	arniml	7277d 14h	/t48/tags/rel_1_0
131	update	arniml	7277d 14h	/t48/tags/rel_1_0
130	initial check-in	arniml	7277d 14h	/t48/tags/rel_1_0
129	cleanup copyright notice	arniml	7339d 22h	/t48/tags/rel_1_0
128	counter_q is not cleared during reset this would match all different descriptions of the Counter as a) if the software assumes that the Counter is modified during reset, it will initialize the Counter anyhow b) the special case 'Counter not modified during reset' is covered	arniml	7347d 02h	/t48/tags/rel_1_0
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7347d 03h	/t48/tags/rel_1_0
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7347d 03h	/t48/tags/rel_1_0
125	exclude from dump compare	arniml	7347d 03h	/t48/tags/rel_1_0
124	fix wrong handling of MB after return from interrupt	arniml	7348d 00h	/t48/tags/rel_1_0
123	support hex file for external ROM	arniml	7348d 00h	/t48/tags/rel_1_0