URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0] - Rev 199

Rev	Log message	Author	Age	Path
179	introduce prefix 't48_' for all packages, entities and configurations	arniml	6975d 02h	/t48/tags/rel_1_0
178	Move latching of BUS to MSTATE2 -> sample BUS at the end of RD'	arniml	6976d 14h	/t48/tags/rel_1_0
177	Implement db_dir_o glitch-safe	arniml	6976d 14h	/t48/tags/rel_1_0
176	Use en_clk_i instead of xtal3_s for generation of external signals. This is required when the core runs with full xtal clock instead of xtal/3 (xtal_div_3_g = 0).	arniml	6976d 14h	/t48/tags/rel_1_0
175	add bug report "MSB of Program Counter changed upon PC increment"	arniml	6977d 17h	/t48/tags/rel_1_0
174	fix bug report "MSB of Program Counter changed upon PC increment"	arniml	6977d 17h	/t48/tags/rel_1_0
173	testcase for bug report "MSB of Program Counter changed upon PC increment"	arniml	6977d 17h	/t48/tags/rel_1_0
172	save data from wishbone bus in register bank with wb_ack necessary to hold data from peripheral/memory until it is read by T48	arniml	7006d 13h	/t48/tags/rel_1_0
171	remove obsolete output stack_high_o	arniml	7007d 14h	/t48/tags/rel_1_0
170	intermediate update	arniml	7008d 20h	/t48/tags/rel_1_0