URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1] - Rev 137

Rev	Log message	Author	Age	Path
117	add bug Program Memory bank can be switched during interrupt	arniml	7349d 04h	/t48/tags/rel_1_1
116	adapt to GHDL 0.12 / gcc 3.4.0	arniml	7377d 04h	/t48/tags/rel_1_1
115	extend description	arniml	7378d 08h	/t48/tags/rel_1_1
114	initial check-in	arniml	7382d 04h	/t48/tags/rel_1_1
113	generate two ROM files based on address: + 0 - 2047 : 2k internal ROM + 2048 - 4095 : 2k external ROM	arniml	7388d 13h	/t48/tags/rel_1_1
112	update tb_behav_c0 for new ROM layout	arniml	7388d 13h	/t48/tags/rel_1_1
111	split 4k internal ROM into + 2k internal ROM + 2k external ROM EA of t48_core is driven by MSB of internal ROM address if upper 2k block is selected, the system switches to EA mode on the fly	arniml	7388d 13h	/t48/tags/rel_1_1
110	exchange syn_rom for lpm_rom	arniml	7388d 13h	/t48/tags/rel_1_1
109	add new bug for release 0.1 BETA	arniml	7389d 02h	/t48/tags/rel_1_1
108	Fix for: External Program Memory ignored when EA = 0	arniml	7389d 02h	/t48/tags/rel_1_1