OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4] - Rev 73

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
53 make istrobe visible through testbench package arniml 7424d 08h /t48/tags/rel_1_4
52 + fix bug in PSW[3]
+ read SP properly for dump
arniml 7424d 08h /t48/tags/rel_1_4
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents
arniml 7424d 08h /t48/tags/rel_1_4
49 Imported sources arniml 7429d 09h /t48/tags/rel_1_4
48 update copyright notice arniml 7429d 09h /t48/tags/rel_1_4
47 initial check-in arniml 7429d 10h /t48/tags/rel_1_4
46 fix test arniml 7431d 07h /t48/tags/rel_1_4
45 remove unused signals arniml 7431d 07h /t48/tags/rel_1_4
44 default assignment for aux_carry_o arniml 7431d 08h /t48/tags/rel_1_4
43 fix sensitivity list arniml 7432d 08h /t48/tags/rel_1_4

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.