URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk] - Rev 115

Rev	Log message	Author	Age	Path
95	Updated regression script to use SystemC simulation	ghutchis	5322d 19h	/tv80/trunk
94	Ported over env_io.v from Verilog environment to tv_responder. Basic tests from Verilog environment (hello, fib) now passing in SystemC environment.	ghutchis	5324d 20h	/tv80/trunk
93	Added common header file for all systemc environment	ghutchis	5325d 19h	/tv80/trunk
92	Added responder to top level, beginning of support for ihex load	ghutchis	5329d 20h	/tv80/trunk
91	Preliminary support for SystemC/Verilator environment	ghutchis	5329d 22h	/tv80/trunk
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5329d 22h	/tv80/trunk
89	RTL and environment fixes for nmi bug	ghutchis	5350d 01h	/tv80/trunk
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5351d 16h	/tv80/trunk
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5366d 23h	/tv80/trunk
84	New directory structure.	root	5590d 11h	/tv80/trunk