URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk] - Rev 67

Rev	Log message	Author	Age	Path
41	Added random-read value port	ghutchis	7193d 03h	/tv80/trunk
40	Added random-read port and block memory instruction test	ghutchis	7193d 03h	/tv80/trunk
39	Added checksum port definitions, and test for block-OUT instructions	ghutchis	7193d 04h	/tv80/trunk
38	Added command-line options for help (-h) and run with instruction decode (-d)	ghutchis	7194d 21h	/tv80/trunk
37	Added new I/O registers for testing block I/O	ghutchis	7194d 21h	/tv80/trunk
36	Removed default instruction decode	ghutchis	7194d 21h	/tv80/trunk
35	Updated IO registers to add checksum and increment-on-read registers used for testing block I/O instructions.	ghutchis	7195d 08h	/tv80/trunk
34	Created test for block I/O instructions	ghutchis	7195d 08h	/tv80/trunk
33	Added missing IncDec controls to OUTI/OUTD instructions	ghutchis	7196d 05h	/tv80/trunk
32	Added "bintr" basic interrupt test, which tests Z80 interrupt mode 1.	ghutchis	7211d 07h	/tv80/trunk