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Subversion Repositories usb_dongle_fpga

[/] [usb_dongle_fpga/] [trunk/] - Rev 49

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Rev	Log message	Author	Age	Path
28	Quartus project files for HW code 5 project files	nuubik	5968d 17h	/usb_dongle_fpga/trunk
27	Initial commit of post code logger block and fifo used in the logger	nuubik	5968d 17h	/usb_dongle_fpga/trunk
26	Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output). Added post code logger block and LPC IO write flow control and flash lock when flash is programmed	nuubik	5968d 17h	/usb_dongle_fpga/trunk
25	Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output). Added 64K byte block read when read length is 0	nuubik	5968d 17h	/usb_dongle_fpga/trunk
24	Added changes for new dongle HW code 5 features	nuubik	5968d 17h	/usb_dongle_fpga/trunk
23	Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed. Forced serial port to hw flow control mode. Added support for new dongle HW code 5 to support fast read and fast write modes	nuubik	5968d 17h	/usb_dongle_fpga/trunk
22	Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed	nuubik	5968d 17h	/usb_dongle_fpga/trunk
20	Fix'ed TAR cycle second part this is not critical update	nuubik	5981d 20h	/usb_dongle_fpga/trunk
19	Fix'ed cycle type init code copy/pase mistake	nuubik	5981d 21h	/usb_dongle_fpga/trunk
18	Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side)	nuubik	5982d 21h	/usb_dongle_fpga/trunk

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