OpenCores

URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw] - Rev 120

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Rev	Log message	Author	Age	Path
95	Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large integer value.	dgisselq	3014d 20h	/zipcpu/trunk/sw
94	These changes make it possible to build binutils-2.25/ here in this directory. "make binutils" should be all that is necessary to build the entire binutils package for the Zip CPU. The default configure script, run from gas-script.sh below, will build and install these utilities in an install/ subdirectory made below sw/.	dgisselq	3039d 17h	/zipcpu/trunk/sw
93	A BINUTILS BACKEND IS NOW AVAILABLE!!!!	dgisselq	3047d 15h	/zipcpu/trunk/sw
89	Minor changes, to include making default branching an ADD.[condition] X,PC instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions. Further zopcodes.cpp contains several bug fixes.	dgisselq	3047d 15h	/zipcpu/trunk/sw
70	Updated the assembler support files, zopcodes in particular, to handle the disassembly of the new very long instruction word codes.	dgisselq	3078d 17h	/zipcpu/trunk/sw
69	This implements the "new Instruction Set" architecture for the Zip CPU. It's a massive change set, that touches just about everything but probably not enough of everything. Please see the spec.pdf for a description of this new architecture.	dgisselq	3084d 21h	/zipcpu/trunk/sw
60	Fixed assembler processing of jump instructions, so that the new fast return instruction can be used. The test file was modified to test pipelined value passing within the CPU. That's where the value gets (re)used before being stored back in the register file. As of this release, all tests work.	dgisselq	3145d 21h	/zipcpu/trunk/sw
59	Adjusted these library routines to use the new stack frame and calling conventions.	dgisselq	3145d 21h	/zipcpu/trunk/sw
55	A test was added to double check whether carry following right shifts worked. This was a necessary part of getting two cycle linear feedback shift register operations working for a memory test on a XuLA2 board. With this, I can now verify that such feedback registers work for pseudorandom number purposes.	dgisselq	3156d 00h	/zipcpu/trunk/sw
54	This builds on the support for backslash character escapes in both single and multicharacter expressions. Backslash character escapes are now possible with quotations and backslashes, and the same code to interpret the escapes is applied to both single and multicharacter sequences.	dgisselq	3156d 00h	/zipcpu/trunk/sw

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.