OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu] - Rev 117

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
97 Added longjump instructions. dgisselq 3031d 14h /zipcpu
96 Added the longjump functionality, so that the assembler will properly assemble
instructions to arbitrary 32-bit addresses.		 dgisselq 3031d 14h /zipcpu
95 Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large
integer value.		 dgisselq 3033d 20h /zipcpu
94 These changes make it possible to build binutils-2.25/ here in this
directory. "make binutils" should be all that is necessary to build the
entire binutils package for the Zip CPU.

The default configure script, run from gas-script.sh below, will build and
install these utilities in an install/ subdirectory made below sw/.		 dgisselq 3058d 17h /zipcpu
93 A BINUTILS BACKEND IS NOW AVAILABLE!!!! dgisselq 3066d 15h /zipcpu
92 Adjustments made to match the simplified early branching. dgisselq 3066d 15h /zipcpu
91 Minor updates. dgisselq 3066d 15h /zipcpu
90 Removed MOV x(PC),PC from the list of possible early branching instructions.
ADD X,PC and LDI X,PC are now the only recognized early branching instructions.
This was done to spare logic, although I don't think I spared more than a
LUT or two.		 dgisselq 3066d 15h /zipcpu
89 Minor changes, to include making default branching an ADD.[condition] X,PC
instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions.

Further zopcodes.cpp contains several bug fixes.		 dgisselq 3066d 15h /zipcpu
88 Eliminated some warnings. The div fixes were to simplify the logic, even though
the result is less readable ...		 dgisselq 3090d 15h /zipcpu

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.