OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] - Rev 82

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
82 correct some typoes, thanks to Hu, Tao wsong0210 4070d 20h /
81 adding a solution in README to a cell lib problem. wsong0210 4438d 20h /
80 make the README file more understandable wsong0210 4518d 16h /
79 update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation wsong0210 4579d 02h /
78 pass link wsong0210 4745d 14h /
77 pass syn elaboration wsong0210 4746d 13h /
76 fix syntex wsong0210 4750d 13h /
75 code finished, start the debugging wsong0210 4750d 14h /
74 in/out buffer finished wsong0210 4751d 14h /
73 input buffer wsong0210 4758d 13h /
72 clos-opt ongoing, Clos switch finished, nxt input buffer wsong0210 4759d 13h /
71 the buffered 2-stage Clos switch wsong0210 4760d 13h /
70 clos-opt ongoing wsong0210 4760d 13h /
69 central module of the Clos wsong0210 4763d 13h /
68 rewite the clos switch in the SDM-Clos-buf router wsong0210 4764d 13h /
67 structure not good, prepare to use new files wsong0210 4764d 15h /
66 clos opt ongoing wsong0210 4779d 07h /
65 pipeline controller wsong0210 4779d 08h /
64 clos opt ongoing wsong0210 4779d 08h /
63 clos opt ongoing wsong0210 4779d 12h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.