OpenCores
URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] - Rev 91

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
91 Filelists updated according to preprocessed files from OpenSPARC T1 1.6 fafa1971 5842d 00h /
90 Added newer files from OpenSPARC T1 1.6 preprocessed with "update_sparccore -ee" fafa1971 5842d 00h /
89 Removed files originated from OpenSPARC T1 Design 1.5 preprocessed with "update_sparccore -me" fafa1971 5842d 00h /
88 After one year found time to translate Giovanni Di Blasi's comments to boot code! fafa1971 5844d 02h /
87 Corrected comment delimiter. fafa1971 5970d 12h /
86 Added 'lain.ux'-style checks for environment vars to be set (I lost data as well!!!). fafa1971 5983d 07h /
85 GREAT synthesis script!!! Performs all bottom-up synthesis without errors. fafa1971 5985d 09h /
84 Again, used module names instead than instance names in bottom-up synthesis approach. fafa1971 5985d 12h /
83 Decreased clock frequency from 250 to 200 MHz. fafa1971 5992d 07h /
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 6003d 07h /
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 6003d 11h /
80 Hyerarchical report_area. fafa1971 6006d 07h /
79 Relaxed timing, added flatten and hyerarchical report_area. fafa1971 6006d 07h /
78 Relaxed timing and added flatten command. fafa1971 6006d 07h /
77 Now includes comments (in Italian!) fafa1971 6091d 05h /
76 Changed again from DB export to DDC export fafa1971 6106d 04h /
75 Changed preprocessing for DC synthesis fafa1971 6106d 08h /
74 Updated filelists. fafa1971 6106d 08h /
73 New version of scripts for DC and to compile boot code fafa1971 6106d 08h /
72 Modified RAM address from 0x400C0 to 0x4C000 fafa1971 6112d 15h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.