OpenCores
URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 43

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
43 *** empty log message *** jesus 7926d 14h /
42 Fixed bus req/ack cycle jesus 7926d 14h /
41 Removed UNISIM library jesus 7926d 14h /
40 Cleanup jesus 7926d 15h /
39 Added -n option and component declaration jesus 7954d 12h /
38 Added Leonardo .ucf generation jesus 7954d 12h /
37 Changed to single register file jesus 7954d 15h /
36 Added component declaration jesus 7954d 15h /
35 Release 0242 jesus 7961d 03h /
34 Updated for ISE 5.1 jesus 7961d 08h /
33 Fixed typo jesus 7971d 00h /
32 Fixed for ISE 5.1 jesus 7971d 00h /
31 Fixed generic name error jesus 7974d 02h /
30 Changed to xilinx specific RAM jesus 7980d 02h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7980d 02h /
28 Adapted for zxgate jesus 7981d 02h /
27 Xilinx SSRAM, initial release jesus 7981d 02h /
26 Fixed instruction timing for POP and DJNZ jesus 7994d 18h /
25 IX/IY timing and ADC/SBC fix jesus 7996d 04h /
24 no message jesus 8002d 00h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.