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Subversion Repositories usb_dongle_fpga

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Rev Log message Author Age Path
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5992d 05h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 6005d 07h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 6005d 07h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 6005d 09h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 6006d 08h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 6006d 09h /
16 Synchronisation with OpenCores release nuubik 6139d 06h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6256d 08h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6268d 08h /
13 This commit was manufactured by cvs2svn to create tag 'SoftVersion_1_1'. 6370d 01h /
12 Added windows py bindings check with nice info print with link to installer nuubik 6370d 01h /
11 one ; in line end possible runtime error nuubik 6370d 01h /
10 fixed a typo nuubik 6373d 23h /
9 Made failing on port open retry nuubik 6373d 23h /
8 Added PCB level test options nuubik 6374d 07h /
7 Fixed pin modes and resyntesized nuubik 6374d 07h /
6 Fixed Cyclon part no in datasheets and drawings nuubik 6411d 04h /
5 This commit was manufactured by cvs2svn to create tag 'HWVersion_1_0'. 6437d 00h /
4 Changed LED SM front to falling to avoid large current switches at the same time as data nuubik 6437d 00h /
3 Changed outputs to LVCMOS and lowered drive current to 2mA to avoid noise on longer tracs and fast switching speeds nuubik 6437d 00h /

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