OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] - Rev 186

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
186 root 5623d 22h /8051/tags/rel_2/
185 root 5679d 23h /8051/tags/rel_2/
180 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7758d 17h /8051/tags/rel_2/
179 add /* synopsys xx_case */ to case statments. simont 7758d 17h /8051/tags/rel_2/
178 x replaced with 0. simont 7758d 19h /8051/tags/rel_2/
177 Fix bug in case of writing and reading from same address. simont 7769d 22h /8051/tags/rel_2/
176 ram modules added. simont 7770d 00h /8051/tags/rel_2/
175 initial inport. simont 7770d 00h /8051/tags/rel_2/
174 ram modules added. simont 7770d 00h /8051/tags/rel_2/
173 simualtion `ifdef added simont 7770d 00h /8051/tags/rel_2/
172 BIST signals added. simont 7772d 23h /8051/tags/rel_2/
171 fix bug in DA operation. simont 7780d 21h /8051/tags/rel_2/
170 removing unused files. simont 7780d 21h /8051/tags/rel_2/
169 remove unused files. simont 7780d 21h /8051/tags/rel_2/
168 modify program list. simont 7780d 22h /8051/tags/rel_2/
167 add readmem for ea. simont 7784d 03h /8051/tags/rel_2/
166 Change test monitor from ports to external data memory. simont 7784d 20h /8051/tags/rel_2/
165 remove dumpvars. simont 7785d 01h /8051/tags/rel_2/
164 initial inport. simont 7785d 01h /8051/tags/rel_2/
163 initial inport simont 7785d 01h /8051/tags/rel_2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.