URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19/] [bench/] - Rev 110

Rev	Log message	Author	Age	Path
110	Waiting for "ready" improved.	mohor	7472d 23h	/dbg_interface/tags/rel_19/bench/
102	New version.	mohor	7474d 18h	/dbg_interface/tags/rel_19/bench/
101	Almost finished.	mohor	7474d 19h	/dbg_interface/tags/rel_19/bench/
99	cpu registers added.	mohor	7475d 21h	/dbg_interface/tags/rel_19/bench/
96	Working.	mohor	7477d 01h	/dbg_interface/tags/rel_19/bench/
95	Temp version.	mohor	7477d 13h	/dbg_interface/tags/rel_19/bench/
93	tmp version.	mohor	7479d 01h	/dbg_interface/tags/rel_19/bench/
92	temp version.	mohor	7482d 04h	/dbg_interface/tags/rel_19/bench/
91	tmp version.	mohor	7482d 23h	/dbg_interface/tags/rel_19/bench/
90	tmp version.	mohor	7483d 18h	/dbg_interface/tags/rel_19/bench/
89	temp4 version.	mohor	7485d 00h	/dbg_interface/tags/rel_19/bench/
88	temp3 version.	mohor	7485d 19h	/dbg_interface/tags/rel_19/bench/
87	tmp2 version.	mohor	7487d 00h	/dbg_interface/tags/rel_19/bench/
80	New version of the debug interface. Not finished, yet.	mohor	7499d 22h	/dbg_interface/tags/rel_19/bench/
75	Simulation files.	mohor	7560d 19h	/dbg_interface/tags/rel_19/bench/
73	CRC logic changed.	mohor	7560d 20h	/dbg_interface/tags/rel_19/bench/
63	Three more chains added for cpu debug access.	simons	7616d 22h	/dbg_interface/tags/rel_19/bench/
47	mon_cntl_o signals that controls monitor mux added.	mohor	8094d 21h	/dbg_interface/tags/rel_19/bench/
38	Few outputs for boundary scan chain added.	mohor	8150d 21h	/dbg_interface/tags/rel_19/bench/
36	Structure changed. Hooks for jtag chain added.	mohor	8154d 21h	/dbg_interface/tags/rel_19/bench/