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[/] [ethmac/] [tags/] [rel_27/] - Rev 240

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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7874d 02h /ethmac/tags/rel_27/
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7874d 02h /ethmac/tags/rel_27/
238 Defines fixed to use generic RAM by default. mohor 7886d 06h /ethmac/tags/rel_27/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7888d 12h /ethmac/tags/rel_27/
235 rev 4. mohor 7889d 02h /ethmac/tags/rel_27/
234 Figure list assed to the revision 3. mohor 7889d 10h /ethmac/tags/rel_27/
233 Revision 0.3 released. Some figures added. mohor 7889d 11h /ethmac/tags/rel_27/
232 fpga define added. mohor 7894d 06h /ethmac/tags/rel_27/
231 Description of Core Modules added (figure). mohor 7896d 07h /ethmac/tags/rel_27/
229 case changed to casex. mohor 7900d 04h /ethmac/tags/rel_27/
227 Changed BIST scan signals. tadejm 7900d 08h /ethmac/tags/rel_27/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7900d 09h /ethmac/tags/rel_27/
225 Some minor changes. tadejm 7900d 09h /ethmac/tags/rel_27/
224 Signals for a wave window in Modelsim. tadejm 7900d 10h /ethmac/tags/rel_27/
223 Some code changed due to bug fixes. tadejm 7900d 11h /ethmac/tags/rel_27/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7904d 09h /ethmac/tags/rel_27/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7907d 09h /ethmac/tags/rel_27/
218 Typo error fixed. (When using Bist) mohor 7907d 11h /ethmac/tags/rel_27/
217 Bist supported. mohor 7907d 11h /ethmac/tags/rel_27/
216 Bist signals added. mohor 7907d 11h /ethmac/tags/rel_27/

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