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[/] [ethmac/] [tags/] [rel_7/] - Rev 125

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Rev	Log message	Author	Age	Path
125	RxAbort changed. Packets received with MRxErr (from PHY) are also aborted.	mohor	7997d 10h	/ethmac/tags/rel_7/
124	Define ETH_MIIMODER_RST corrected to 0x00000400.	mohor	7997d 11h	/ethmac/tags/rel_7/
122	ethernet spram added. So far a generic ram and xilinx RAMB4 are used.	mohor	7999d 12h	/ethmac/tags/rel_7/
121	gsr added for use when ETH_XILINX_RAMB4 define is set.	mohor	7999d 12h	/ethmac/tags/rel_7/
120	Unused files removed.	mohor	7999d 13h	/ethmac/tags/rel_7/
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	7999d 13h	/ethmac/tags/rel_7/
118	ShiftEnded synchronization changed.	mohor	8003d 04h	/ethmac/tags/rel_7/
117	Clock mrx_clk set to 2.5 MHz.	mohor	8003d 14h	/ethmac/tags/rel_7/
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	8003d 15h	/ethmac/tags/rel_7/
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	8004d 12h	/ethmac/tags/rel_7/
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	8005d 10h	/ethmac/tags/rel_7/
113	RxPointer bug fixed.	mohor	8012d 02h	/ethmac/tags/rel_7/
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	8012d 15h	/ethmac/tags/rel_7/
111	Master state machine had a bug when switching from master write to master read.	mohor	8013d 05h	/ethmac/tags/rel_7/
110	m_wb_cyc_o signal released after every single transfer.	mohor	8013d 08h	/ethmac/tags/rel_7/
109	Comment removed.	mohor	8013d 08h	/ethmac/tags/rel_7/
108	Testbench supports unaligned accesses.	mohor	8080d 18h	/ethmac/tags/rel_7/
107	TX_BUF_BASE changed.	mohor	8080d 18h	/ethmac/tags/rel_7/
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8080d 18h	/ethmac/tags/rel_7/
105	Compiler directives added. Tx and Rx fifo size incremented. A "late collision" bug fixed.	mohor	8089d 20h	/ethmac/tags/rel_7/

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Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_7/] - Rev 125

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