OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 51

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
51 Fixed simulation issue when writing to CR register rherveille 7409d 15h /i2c/trunk/
50 *** empty log message *** rherveille 7424d 09h /i2c/trunk/
49 Added testbench rherveille 7424d 10h /i2c/trunk/
48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 7425d 17h /i2c/trunk/
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 7434d 13h /i2c/trunk/
46 Fixed slave address MSB='1' bug rherveille 7509d 14h /i2c/trunk/
45 Added slave address configurability rherveille 7509d 14h /i2c/trunk/
43 Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'. rherveille 7594d 17h /i2c/trunk/
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 7604d 15h /i2c/trunk/
39 Forgot an 'end if' :-/ rherveille 7624d 10h /i2c/trunk/
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.		 rherveille 7627d 18h /i2c/trunk/
37 Fixed a type in example 1
Changed 'RW' to 'W' in command register description.
Changed 'RW' to 'W' in transmit register description.		 rherveille 7664d 10h /i2c/trunk/
36 Fixed cmd_ack generation item (no bug). rherveille 7779d 11h /i2c/trunk/
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7813d 01h /i2c/trunk/
34 Fixed a few 'arbitration lost' bugs. VHDL version only. rherveille 7816d 23h /i2c/trunk/
33 Fixed a bug in the Command Register declaration. rherveille 7839d 08h /i2c/trunk/
32 Multi-master capabilities added to the core. Changed documentation accordingly.
Updated some timing diagrams.		 rherveille 7849d 08h /i2c/trunk/
31 Core is now a Multimaster I2C controller. rherveille 7853d 09h /i2c/trunk/
30 Small code simplifications rherveille 7853d 09h /i2c/trunk/
29 Core is now a Multimaster I2C controller rherveille 7853d 10h /i2c/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.