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[/] [openmsp430/] [trunk/] - Rev 94

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94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4898d 04h /openmsp430/trunk/
93 Update Tools' Windows executables. olivier.girard 4902d 03h /openmsp430/trunk/
92 Fixed bug where the openmsp430-minidebug application shows data memory size instead of program memory size and program memory size instead of data memory size.
Thanks to "dir" for reporting the bug :-)		 olivier.girard 4902d 05h /openmsp430/trunk/
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4902d 05h /openmsp430/trunk/
90 Update windows executables for the tools. olivier.girard 4917d 10h /openmsp430/trunk/
89 Update the loader tool to support Intel-HEX format. olivier.girard 4917d 10h /openmsp430/trunk/
88 Update windows executables for the tools. olivier.girard 4917d 11h /openmsp430/trunk/
87 Minor update of gdbproxy to allow sourcing some custom tcl scripts.
Major update of the minidebugger (complete re-work of the GUI).		 olivier.girard 4917d 11h /openmsp430/trunk/
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4925d 02h /openmsp430/trunk/
85 Diverse RTL cosmetic updates. olivier.girard 4925d 03h /openmsp430/trunk/
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4930d 04h /openmsp430/trunk/
83 Add Oscilloscope screenshot + link to the original game. olivier.girard 4976d 05h /openmsp430/trunk/
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories		 olivier.girard 4976d 05h /openmsp430/trunk/
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 4979d 03h /openmsp430/trunk/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4979d 11h /openmsp430/trunk/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4991d 05h /openmsp430/trunk/
78 update windows executable files olivier.girard 4993d 04h /openmsp430/trunk/
77 Tool script update with additional checks:
- execution of the "msp430-objcopy" ran properly
- add a timeout delay to wait for the generated bin file
- check if the size of the ELF file program section is the same as the available program memory.		 olivier.girard 4993d 05h /openmsp430/trunk/
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4996d 03h /openmsp430/trunk/
75 Update development tools windows executable to support memories whose size are not a power of 2. olivier.girard 5078d 04h /openmsp430/trunk/

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