OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_72/] [or1ksim/] - Rev 501

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
501 Added .cvsignore files for annoying generated files in testbench erez 8215d 10h /or1k/tags/nog_patch_72/or1ksim/
500 Added .cvsignore files for annoying generated files erez 8215d 10h /or1k/tags/nog_patch_72/or1ksim/
499 Made testbench/support/int.c more usable and changed acv_gpio test to use it erez 8215d 11h /or1k/tags/nog_patch_72/or1ksim/
498 Fixed data type bug in l_mac() that caused incorrect calculation of MACHI. Possible that l_msb has the same bug. lampret 8226d 19h /or1k/tags/nog_patch_72/or1ksim/
497 Fixed encoding of the following insns: l.mac,l.msb,l.maci,l.mtspr,l.mfspr lampret 8226d 20h /or1k/tags/nog_patch_72/or1ksim/
495 added missing enddevice command in GPIO section markom 8227d 08h /or1k/tags/nog_patch_72/or1ksim/
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8227d 08h /or1k/tags/nog_patch_72/or1ksim/
493 --enable-opt switch added to testbench configure markom 8227d 10h /or1k/tags/nog_patch_72/or1ksim/
492 uart THRE interrupt immedialty after write to IER markom 8227d 10h /or1k/tags/nog_patch_72/or1ksim/
491 pc command fixed markom 8228d 06h /or1k/tags/nog_patch_72/or1ksim/
490 clkcycle parsing problem fixed markom 8228d 06h /or1k/tags/nog_patch_72/or1ksim/
486 Updated documentation in default sim.cfg erez 8228d 12h /or1k/tags/nog_patch_72/or1ksim/
485 gdb.h moved to debug dir; except.ld renamed to default.ld markom 8228d 13h /or1k/tags/nog_patch_72/or1ksim/
484 Changed to support execution from various addresses. simons 8229d 02h /or1k/tags/nog_patch_72/or1ksim/
483 Implemented some GPIO tests erez 8229d 02h /or1k/tags/nog_patch_72/or1ksim/
482 profiling uses l.jr instead of obsolete l.jalr markom 8229d 06h /or1k/tags/nog_patch_72/or1ksim/
481 -f bug fixed markom 8229d 06h /or1k/tags/nog_patch_72/or1ksim/
480 RTL_SIM define added for shorter simulation runtime. simons 8229d 06h /or1k/tags/nog_patch_72/or1ksim/
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8229d 06h /or1k/tags/nog_patch_72/or1ksim/
478 Started adding acv_gpio testbench erez 8229d 06h /or1k/tags/nog_patch_72/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.