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[/] [or1k/] [tags/] [rel_16/] [or1200/] [rtl/] - Rev 387

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Rev Log message Author Age Path
387 Now FPGA and ASIC target are separate. lampret 8265d 22h /or1k/tags/rel_16/or1200/rtl/
386 Fixed VS RAM instantiation - again. lampret 8265d 22h /or1k/tags/rel_16/or1200/rtl/
370 Program counter divided to PPC and NPC. simons 8269d 20h /or1k/tags/rel_16/or1200/rtl/
367 Changed DSR/DRR behavior and exception detection. lampret 8270d 09h /or1k/tags/rel_16/or1200/rtl/
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8271d 04h /or1k/tags/rel_16/or1200/rtl/
360 Added OR1200_REGISTERED_INPUTS. lampret 8272d 20h /or1k/tags/rel_16/or1200/rtl/
359 Added optional sampling of inputs. lampret 8272d 20h /or1k/tags/rel_16/or1200/rtl/
358 Fixed virtual silicon single-port rams instantiation. lampret 8272d 20h /or1k/tags/rel_16/or1200/rtl/
357 Fixed dbg_is_o assignment width. lampret 8272d 20h /or1k/tags/rel_16/or1200/rtl/
356 Break point bug fixed simons 8272d 23h /or1k/tags/rel_16/or1200/rtl/
354 Fixed width of du_except. lampret 8273d 17h /or1k/tags/rel_16/or1200/rtl/
353 Cashes disabled. simons 8274d 03h /or1k/tags/rel_16/or1200/rtl/
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8275d 06h /or1k/tags/rel_16/or1200/rtl/
351 Fixed some l.trap typos. lampret 8275d 08h /or1k/tags/rel_16/or1200/rtl/
350 For GDB changed single stepping and disabled trap exception. lampret 8275d 09h /or1k/tags/rel_16/or1200/rtl/
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8280d 08h /or1k/tags/rel_16/or1200/rtl/
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8280d 08h /or1k/tags/rel_16/or1200/rtl/
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8281d 16h /or1k/tags/rel_16/or1200/rtl/
316 Fixed exceptions. lampret 8283d 14h /or1k/tags/rel_16/or1200/rtl/
271 Added missing endif lampret 8288d 03h /or1k/tags/rel_16/or1200/rtl/

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