URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_00/] - Rev 33

Rev	Log message	Author	Age	Path
33	Added some testcases, removed un-needed fifo signals	mihad	8169d 05h	/pci/tags/rel_00/
32	Added include statement that was missing and causing errors	mihad	8177d 02h	/pci/tags/rel_00/
31	User defined constants used for Test Application	tadej	8179d 21h	/pci/tags/rel_00/
30	Example of PCI testbench log file	mihad	8180d 05h	/pci/tags/rel_00/
29	Xilinx synthesys log file	tadej	8180d 08h	/pci/tags/rel_00/
28	pci/doc/pci_databook.pdf	tadej	8181d 02h	/pci/tags/rel_00/
27	Modified testbench and fixed some bugs	mihad	8183d 00h	/pci/tags/rel_00/
26	Modified testbench and fixed some bugs	mihad	8183d 00h	/pci/tags/rel_00/
25	* empty log message *	mihad	8200d 23h	/pci/tags/rel_00/
24	* empty log message *	mihad	8200d 23h	/pci/tags/rel_00/
23	* empty log message *	mihad	8201d 01h	/pci/tags/rel_00/
22	Added short description for simulation running	mihad	8201d 01h	/pci/tags/rel_00/
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8201d 02h	/pci/tags/rel_00/
20	* empty log message *	mihad	8201d 02h	/pci/tags/rel_00/
19	* empty log message *	mihad	8201d 02h	/pci/tags/rel_00/
18	* empty log message *	mihad	8201d 02h	/pci/tags/rel_00/
17	* empty log message *	mihad	8201d 03h	/pci/tags/rel_00/
16	Import of various scripts for simulation running	mihad	8201d 03h	/pci/tags/rel_00/
15	Initial testbench import. Still under development	mihad	8201d 03h	/pci/tags/rel_00/
14	* empty log message *	mihad	8201d 03h	/pci/tags/rel_00/