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Rev Log message Author Age Path
29 Add reset functionality for the WB arbiter state machine skordal 3328d 02h /potato/
28 Add rudimentary User's manual skordal 3334d 01h /potato/
27 Prevent exceptions from being taken while stalling skordal 3334d 03h /potato/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3334d 06h /potato/
25 Add placeholder cache modules and a wishbone arbiter skordal 3336d 11h /potato/
24 Remove unused STRINGIFY macros skordal 3337d 00h /potato/
23 Create branch to use for implementing a cache skordal 3337d 00h /potato/
22 Fix the potato_get_badvaddr() macro skordal 3337d 00h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3337d 01h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3337d 01h /potato/
19 SHA256 benchmark: allow compiler to inline at will skordal 3337d 01h /potato/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3339d 01h /potato/
17 Improve detection of unaligned instructions skordal 3343d 08h /potato/
16 Correct grammar in source code comment skordal 3343d 08h /potato/
15 SHA256 benchmark: fix Makefile syntax error skordal 3350d 00h /potato/
14 Improve detection of invalid instructions skordal 3350d 01h /potato/
13 Add SHA256 benchmark code skordal 3350d 05h /potato/
12 Update example design with correct bug-report URL and testbenches skordal 3350d 08h /potato/
11 Correct FIFO file header skordal 3350d 08h /potato/
10 Add missing FIFO module skordal 3355d 02h /potato/

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