URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] [sw/] - Rev 173

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
173	testcase for bug report "MSB of Program Counter changed upon PC increment"	arniml	6995d 12h	/t48/tags/rel_0_6_1_beta/sw/
141	disable external memory to avoid conflicts with outl a, bus	arniml	7221d 11h	/t48/tags/rel_0_6_1_beta/sw/
132	stop simulation upon assertion error	arniml	7265d 07h	/t48/tags/rel_0_6_1_beta/sw/
131	update	arniml	7265d 07h	/t48/tags/rel_0_6_1_beta/sw/
130	initial check-in	arniml	7265d 07h	/t48/tags/rel_0_6_1_beta/sw/
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7334d 19h	/t48/tags/rel_0_6_1_beta/sw/
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7334d 19h	/t48/tags/rel_0_6_1_beta/sw/
125	exclude from dump compare	arniml	7334d 19h	/t48/tags/rel_0_6_1_beta/sw/
124	fix wrong handling of MB after return from interrupt	arniml	7335d 16h	/t48/tags/rel_0_6_1_beta/sw/
123	support hex file for external ROM	arniml	7335d 16h	/t48/tags/rel_0_6_1_beta/sw/
122	test MB after return from interrupt	arniml	7335d 16h	/t48/tags/rel_0_6_1_beta/sw/
118	test MB/interrupt behaviour according to bug report "Program Memory bank can be switched during interrupt"	arniml	7338d 10h	/t48/tags/rel_0_6_1_beta/sw/
113	generate two ROM files based on address: + 0 - 2047 : 2k internal ROM + 2048 - 4095 : 2k external ROM	arniml	7378d 20h	/t48/tags/rel_0_6_1_beta/sw/
104	add white_box directory to test suite	arniml	7382d 16h	/t48/tags/rel_0_6_1_beta/sw/
102	update for changes in address space of external memory	arniml	7382d 16h	/t48/tags/rel_0_6_1_beta/sw/
99	initial check-in	arniml	7382d 16h	/t48/tags/rel_0_6_1_beta/sw/
97	initial check-in	arniml	7382d 17h	/t48/tags/rel_0_6_1_beta/sw/
96	select dedicated directorie(s) for regression	arniml	7383d 15h	/t48/tags/rel_0_6_1_beta/sw/
95	check counter inactivity	arniml	7383d 15h	/t48/tags/rel_0_6_1_beta/sw/
94	initial check-in	arniml	7383d 15h	/t48/tags/rel_0_6_1_beta/sw/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] [sw/] - Rev 173

Filtering Options