URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] - Rev 133

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
133	add checks for PSEN	arniml	7244d 16h	/t48/tags/rel_1_4/
132	stop simulation upon assertion error	arniml	7244d 16h	/t48/tags/rel_1_4/
131	update	arniml	7244d 16h	/t48/tags/rel_1_4/
130	initial check-in	arniml	7244d 16h	/t48/tags/rel_1_4/
129	cleanup copyright notice	arniml	7307d 00h	/t48/tags/rel_1_4/
128	counter_q is not cleared during reset this would match all different descriptions of the Counter as a) if the software assumes that the Counter is modified during reset, it will initialize the Counter anyhow b) the special case 'Counter not modified during reset' is covered	arniml	7314d 04h	/t48/tags/rel_1_4/
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7314d 05h	/t48/tags/rel_1_4/
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7314d 05h	/t48/tags/rel_1_4/
125	exclude from dump compare	arniml	7314d 05h	/t48/tags/rel_1_4/
124	fix wrong handling of MB after return from interrupt	arniml	7315d 02h	/t48/tags/rel_1_4/
123	support hex file for external ROM	arniml	7315d 02h	/t48/tags/rel_1_4/
122	test MB after return from interrupt	arniml	7315d 02h	/t48/tags/rel_1_4/
121	update bug description for Program Memory bank can be switched during interrupt	arniml	7317d 19h	/t48/tags/rel_1_4/
120	Fix bug report: "Program Memory bank can be switched during interrupt" int module emits int_in_progress signal that is used inside the decoder to hold mb low for JMP and CALL during interrupts	arniml	7317d 19h	/t48/tags/rel_1_4/
119	add int_in_progress_o to entity of int module	arniml	7317d 19h	/t48/tags/rel_1_4/
118	test MB/interrupt behaviour according to bug report "Program Memory bank can be switched during interrupt"	arniml	7317d 19h	/t48/tags/rel_1_4/
117	add bug Program Memory bank can be switched during interrupt	arniml	7318d 20h	/t48/tags/rel_1_4/
116	adapt to GHDL 0.12 / gcc 3.4.0	arniml	7346d 20h	/t48/tags/rel_1_4/
115	extend description	arniml	7348d 00h	/t48/tags/rel_1_4/
114	initial check-in	arniml	7351d 20h	/t48/tags/rel_1_4/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] - Rev 133

Filtering Options