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130 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7460d 06h /
129 New documentation. mohor 7460d 06h /
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.
mohor 7462d 14h /
127 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7465d 14h /
126 run_sim.scr renamed to run_sim for VATS. mohor 7465d 14h /
125 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7467d 10h /
124 Display for VATS added. mohor 7467d 10h /
123 All flipflops are reset. mohor 7467d 11h /
122 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7470d 11h /
121 Port signals are all set to zero after reset. mohor 7470d 11h /
120 test stall_test added. mohor 7470d 14h /
119 cpu_stall_o activated as soon as bp occurs. mohor 7470d 14h /
118 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7472d 10h /
117 Define name changed. mohor 7472d 10h /
116 Data latching changed when testing WB. mohor 7472d 11h /
115 More debug data added. mohor 7472d 14h /
114 CRC generation iand verification in bench changed. mohor 7472d 16h /
113 IDCODE test improved. mohor 7472d 17h /
112 dbg_tb_defines.v not used. mohor 7473d 11h /
111 Define tap_defines.v added to test bench. mohor 7473d 11h /

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