URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] - Rev 1186

Rev	Log message	Author	Age	Path
1186	Added support for rams with byte write access.	simons	7645d 04h	/
1185	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7651d 21h	/
1184	Scan signals mess fixed.	simons	7651d 21h	/
1183	OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0	sfurman	7656d 12h	/
1182	This commit was manufactured by cvs2svn to create tag 'VER_5_3'.		7656d 15h	/
1181	Initial import of unmodified gdb-5.3 source on vendor branch	sfurman	7656d 15h	/
1180	This commit was manufactured by cvs2svn to create tag 'rel_10'.		7660d 00h	/
1179	BIST interface added for Artisan memory instances.	simons	7660d 00h	/
1178	avoid another immu exception that should not happen	phoenix	7689d 11h	/
1177	more informative output	phoenix	7690d 18h	/
1176	Added comments.	damonb	7691d 09h	/
1175	Added three missing wire declarations. No functional changes.	lampret	7691d 12h	/
1174	fix for immu exceptions that never should have happened	phoenix	7692d 13h	/
1173	Added QMEM.	lampret	7693d 21h	/
1172	Added embedded memory QMEM.	lampret	7693d 22h	/
1171	Added embedded memory QMEM.	lampret	7693d 22h	/
1170	Added support for l.addc instruction.	csanchez	7700d 17h	/
1169	Added support for l.addc instruction.	csanchez	7700d 18h	/
1168	Added explicit alignment expressions.	csanchez	7706d 04h	/
1167	Corrected offset of TSS field within task_struct.	csanchez	7706d 04h	/