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Rev Log message Author Age Path
1201 This commit was manufactured by cvs2svn to create tag 'rel_15'. 7533d 11h /
1200 mbist signals updated according to newest convention markom 7533d 11h /
1199 Daniel Wiklund: Removed multiple entries of debug/Makefile in configure danwi 7537d 11h /
1198 make it compile on RH 8,9 phoenix 7563d 02h /
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it
dries 7568d 07h /
1196 removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se) dries 7568d 09h /
1195 made the project file a little bit more universal dries 7568d 10h /
1194 correct all the syntax errors dries 7568d 10h /
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'
dries 7568d 10h /
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7568d 11h /
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7568d 12h /
1190 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7584d 10h /
1189 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7584d 10h /
1188 Added support for rams with byte write access. simons 7584d 10h /
1187 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7585d 09h /
1186 Added support for rams with byte write access. simons 7585d 09h /
1185 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7592d 02h /
1184 Scan signals mess fixed. simons 7592d 02h /
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7596d 18h /
1182 This commit was manufactured by cvs2svn to create tag 'VER_5_3'. 7596d 20h /

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