URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 81

Rev	Log message	Author	Age	Path
81	Updated synchronization in top level fifo modules.	mihad	7817d 16h	/
80	This commit was manufactured by cvs2svn to create tag 'rel_4'.		7820d 21h	/
79	Updated.	mihad	7820d 21h	/
78	Old files with wrong names removed.	mihad	7820d 21h	/
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7820d 22h	/
76	TRDY output delay was 10 instead of 11. Repaired.	mihad	7823d 21h	/
75	Include statement moved out of off/on pragma as reported by Uwe.	mihad	7826d 22h	/
74	This commit was manufactured by cvs2svn to create tag 'rel_3'.		7826d 22h	/
73	Bug fixes, testcases added.	mihad	7826d 22h	/
72	* empty log message *	mihad	7874d 02h	/
71	Changed the code a bit to make it more readable. Functionality not changed in any way. More robust synchronization in fifos is still pending.	mihad	7881d 18h	/
70	This commit was manufactured by cvs2svn to create tag 'rel_2'.		7919d 01h	/
69	Changed BIST signal names etc..	mihad	7919d 01h	/
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7922d 11h	/
67	Changed BIST signals for RAMs.	tadejm	7922d 15h	/
66	Changed empty status generation in pciw_fifo_control.v	mihad	7926d 02h	/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7929d 00h	/
64	The testcase I just added in previous revision repaired	mihad	7929d 02h	/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7929d 04h	/
62	Added BIST signals for RAMs.	mihad	7931d 21h	/