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Rev	Log message	Author	Age	Path
35	Prevent jumping/branching when stalling	skordal	3319d 11h	/
34	Prevent flushing the pipeline if it is stalling	skordal	3319d 11h	/
33	Ensure correct read of CSR after stall	skordal	3319d 11h	/
32	Prevent jumping/branching when stalling	skordal	3322d 08h	/
31	Prevent flushing the pipeline if it is stalling	skordal	3322d 09h	/
30	Add testcase for a combination of instructions that fail when using cache	skordal	3324d 13h	/
29	Add reset functionality for the WB arbiter state machine	skordal	3327d 09h	/
28	Add rudimentary User's manual	skordal	3333d 08h	/
27	Prevent exceptions from being taken while stalling	skordal	3333d 10h	/
26	Prevent exceptions from being taken while stalling Jumping to an exception handler while stalling and waiting for a load/store instruction to finish can cause undefined results from the load/store instruction. This actually fixes the issue mentioned in revision r20.	skordal	3333d 13h	/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3335d 17h	/
24	Remove unused STRINGIFY macros	skordal	3336d 06h	/
23	Create branch to use for implementing a cache	skordal	3336d 07h	/
22	Fix the potato_get_badvaddr() macro	skordal	3336d 07h	/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3336d 07h	/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3336d 07h	/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3336d 07h	/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3338d 07h	/
17	Improve detection of unaligned instructions	skordal	3342d 14h	/
16	Correct grammar in source code comment	skordal	3342d 14h	/

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[/] - Rev 35

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