URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 132

Rev	Log message	Author	Age	Path
112	change timers to meet timing specifications (add divider with 12)	simont	7789d 10h	/
111	Remove instruction cache and wb_interface	simont	7790d 01h	/
110	change adr_i and adr_o length.	simont	7790d 01h	/
109	add `include "oc8051_defines.v"	simont	7790d 01h	/
108	fix some bugs, use oc8051_cache_ram.	simont	7790d 01h	/
107	Include instruction cache.	simont	7790d 01h	/
106	generic_dpram used	simont	7791d 04h	/
105	generic_dpram used	simont	7791d 04h	/
104	use generic_dpram	simont	7791d 04h	/
103	rename signals	simont	7791d 05h	/