URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 47

Rev	Log message	Author	Age	Path
27	Cleaned up code	rherveille	7856d 16h	/
26	* empty log message *	rherveille	7860d 00h	/
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7887d 20h	/
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7887d 20h	/
23	* empty log message *	rherveille	8015d 02h	/
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8025d 07h	/
21	no message	rherveille	8111d 07h	/
20	Added Appendix A	rherveille	8111d 07h	/
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8115d 04h	/
18	no message	rherveille	8142d 00h	/