URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] - Rev 186

Rev	Log message	Author	Age	Path
166	Modified simulator, added some debug functionality: - Optional emulation of some MIPS32r2 opcodes - Function call trace log using map file (crude implementation) Plus a few small bug fixes	ja_rd	4809d 08h	/
165	Added (very early draft, very incomplete) reserved opcode trap handler. Updated opcode tester to test some emulated mips32 opcodes using the trap handler.	ja_rd	4814d 16h	/
164	Minor typo fixes in source file	ja_rd	4814d 16h	/
163	SW simulator update: Better disassembly format (hastily tested) New parameters: start address, breakpoint address, whether or not to trap reserved opcodes	ja_rd	4814d 17h	/
162	Fixed stupid mistake in headers (date of project)	ja_rd	4815d 08h	/
161	Added GPL license info to the vhdl headers This project is becoming respectable :)	ja_rd	4815d 08h	/
160	BUG FIX: the cache init code was messing the BSS initialization	ja_rd	4816d 10h	/
159	bug detected but not fixed in cpu (1st instruction after entering user mode is executed in kernel mode)	ja_rd	4816d 17h	/
158	removed file from TB directory which was committed by mistake	ja_rd	4816d 17h	/
157	Bug fix in the missing coprocesor exception. The CPU was triggering a privilege exception for the mtc0 that went into user mode. Logging HDL updated	ja_rd	4818d 03h	/