URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] - Rev 54

Rev	Log message	Author	Age	Path
34	Added all the new files for Wishbone peripherals	fafa1971	5699d 10h	/
33	Added files from Mistral's new world	fafa1971	5699d 10h	/
32	Moved files from m1_cpu to m1_core dir	fafa1971	5699d 10h	/
31	New world for Mistral	fafa1971	5699d 10h	/
30	First version with functional verification results.	fafa1971	5776d 09h	/
29	Using code.txt from hello.c	fafa1971	5784d 04h	/
28	Changed NOR operator from (a~\|b) to ~(a\|b)	fafa1971	5784d 09h	/
27	Corrected problems with synthesis and removed system control registers	fafa1971	5790d 08h	/
26	Changed blocking / non-blocking assignments for MUL and DIV requests	fafa1971	5790d 08h	/
25	For now the top-level for synthesis is just m1_cpu	fafa1971	5790d 09h	/