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Rev Log message Author Age Path
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.
mcafruni 1914d 07h /
17 Removing unnecessary clock-gate architecture. mcafruni 1914d 08h /
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1947d 16h /
15 FIR filter with 36 coefficients. mcafruni 1947d 16h /
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1951d 11h /
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1951d 11h /
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1951d 11h /
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1951d 11h /
10 Matrix/Vector multiplication by constant. (binary) mcafruni 1961d 09h /
9 Matrix/Vector multiplication by constant. mcafruni 1961d 09h /

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