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Subversion Repositories minimips_superscalar

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Rev Log message Author Age Path
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1579d 05h /
19 mcafruni 1912d 21h /
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.
mcafruni 1912d 21h /
17 Removing unnecessary clock-gate architecture. mcafruni 1912d 22h /
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1946d 06h /
15 FIR filter with 36 coefficients. mcafruni 1946d 06h /
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1950d 01h /
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1950d 01h /
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1950d 01h /
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1950d 01h /

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