URL https://opencores.org/ocsvn/mlite/mlite/trunk

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[/] - Rev 151

Rev	Log message	Author	Age	Path
131	Changed "GENERIC" to "DEFAULT" to be Xilinx friendly.	rhoads	7216d 06h	/
130	Added better spacing	rhoads	7216d 06h	/
129	Added reset_in to sensitivity list	rhoads	7235d 06h	/
128	Reset all registers, constants now upper case.	rhoads	7353d 17h	/
127	This commit was manufactured by cvs2svn to create tag 'V2_1'.		7372d 07h	/
126	Added note that CC is for x86 and gmake has problems with MIPS gcc libraries.	rhoads	7372d 07h	/
125	Fixed pc_source_type comment.	rhoads	7372d 07h	/
124	Holger Lohn's fix for interrupts when 3-state pipeline enabled.	rhoads	7372d 07h	/
123	Uncomment out the Altera portion. Xilinx users may need to re-comment out this section.	rhoads	7439d 07h	/
122	Added comment to explain why c_bus isn't delayed but reg_dest is delayed.	rhoads	7503d 08h	/