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Rev Log message Author Age Path
243 Optimized code to prefer RAM vs register. jshamlet 1513d 18h /
242 Added write protect logic to the RAM cores and system timer as part of scheme to keep tasks from messing up the scheduler or other task's memory. The RAM is now divided into regions with a separate write mask register. The write mask register itself is only writeable with the I bit is set (during an interrupt or by setting it using STP PSR_I). The 1K memory is divided into 16, 64 byte regions while the 4K memory is divided into 32, 128 byte regions. The system timer simply checks for the I bit being set when the write protect generic is set.

Note that setting the write_protect generic false, or leaving it unset, will keep the previous behavior.
jshamlet 1513d 19h /
241 Added an Open8 compatible 7-segment display/decoder and uploaded local/private documentation. jshamlet 1518d 14h /
240 Simplified the vector tx/rx system to a single line. An idle detector replaces the attn_req signal. jshamlet 1520d 17h /
239 More cleanup and notation of board to board I/O jshamlet 1520d 22h /
238 Removed extraneous reference to Ints.VEC_Flag from task.s, since it is supposed to be in the init function in test_fn.s. jshamlet 1521d 18h /
237 Found some errors in the comments and cleaned up unnecessary library references. jshamlet 1521d 20h /
236 More software cleanup for the Open8_II project jshamlet 1521d 21h /
235 Ok, this time with feeling. jshamlet 1526d 15h /
234 Forgot to add documentation jshamlet 1526d 18h /

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