URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 287

Rev	Log message	Author	Age	Path
267	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5096d 02h	/
266	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5096d 03h	/
265	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5096d 03h	/
264	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5096d 03h	/
263	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5096d 03h	/
262	Baseline port of GCC 4.5.1 for OpenRISC 1000.	jeremybennett	5096d 04h	/
261	Linux patch update - all ioremap calls now default with cache inhibit	julius	5097d 17h	/
260	Fixed `define in FPU that didnt need to be there	julius	5097d 17h	/
259	Fixing or1200_defines FPU module selection defines - They are no longer needed	julius	5099d 13h	/
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5099d 13h	/