OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 487

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 4938d 16h /
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README		 julius 4938d 22h /
465 ORPSoC SPI flash load Makefile and README updates. julius 4939d 12h /
464 More ORPmon updates. julius 4939d 13h /
463 ORPmon update julius 4939d 16h /
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.		 julius 4939d 21h /
461 Updated to be much stricter about usage. jeremybennett 4941d 16h /
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4941d 18h /
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4942d 00h /
458 or1ksim testsuite updates julius 4942d 22h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.