OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 350

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
330 Cache test lampret 8292d 10h /
329 Now using macros from spr_defs.h lampret 8292d 10h /
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8292d 12h /
327 simulate_dc_mmu_load() was calling insn cache/mmu routines instead of data cache/mmu. Fixed. lampret 8292d 12h /
326 More realistic default cache type. lampret 8292d 12h /
325 minor ethernet testbench modifications erez 8293d 15h /
324 added initial ethernet RX simulation (very simple for now) erez 8293d 15h /
323 small fix erez 8293d 15h /
322 IC test repaired.C simons 8293d 19h /
321 added missing gdbcomm files markom 8293d 21h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.