URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 410

Rev	Log message	Author	Age	Path
390	Changed instantiation name of VS RAMs.	lampret	8292d 08h	/
389	Changed default delay for load and store in superscalar cpu.	lampret	8292d 09h	/
388	Added comments for cpu section.	lampret	8292d 09h	/
387	Now FPGA and ASIC target are separate.	lampret	8292d 10h	/
386	Fixed VS RAM instantiation - again.	lampret	8292d 10h	/
385	check testbench now modified to work with new report output	markom	8292d 16h	/
384	modified simmem.cfg structure! ADD > BEFORE EACH LINE!	markom	8292d 17h	/
383	modified simmem.cfg structure! ADD	markom	8292d 18h	/
382	bitmask function bug fixed	markom	8292d 19h	/
381	number display is more strict with 0x prefix with hex numbers	markom	8292d 19h	/