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Rev Log message Author Age Path
166 A strong revision on the decodification of the places to shift must be done..... I mean s5factor is EATING memory (Altera Synthesis), perhaps thats a better way jguarin2002 4489d 03h /
165 Fix on the decodification of factor to add or sub to the final exponent after mantissa normalization (Stage 5, s5factor) jguarin2002 4489d 12h /
164 reverting the not(s0delta(7)) change on revision 163 to s0delta(7) again jguarin2002 4490d 13h /
163 dpc: Signals to eval in functional simulatio. Fix on the codification of the sign applied into the arithmetic block depending on the UCA code of the instruction being excuted. Also a correction was done on the decodification of the result queues write signals. A correction applied on the decodification of the interruptions generated due to full queues. RayTrac: A signal to decode the sign that goes into the addition operations was made as long with its combinatorial operation to calculate it. Fadd32: Signals to eval in functional simulation. An important bug was fixed when decoding the shift to normalize the mantissa of the float number with the minor exponent, that was causing a misscalculation of the normalized mantissa. Arithpack: Formatting of the instruction at function ap_format_instruction fixed due to a change in the opcodes of the unary instructions. jguarin2002 4490d 15h /
162 Señales para evaluar en simulación funcional jguarin2002 4490d 15h /
161 Changes for the sake of the firsts simulation tracking results jguarin2002 4492d 07h /
160 Corrections derived from simulation debugging jguarin2002 4496d 23h /
159 wrcycle\!\? No\! rwcycle.... jguarin2002 4498d 09h /
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4498d 13h /
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 4499d 01h /

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